I’ve been trying for days to get my ESP32 Dev 38 pins to work with an RFM95W 868 MHz so that I can use the TTN. Unfortunately I can’t get any further and I’m desperate.
I (329) spi_flash: detected chip: generic
I (332) spi_flash: flash io: dio
I (337) app_start: Starting scheduler on CPU0
I (341) app_start: Starting scheduler on CPU1
I (341) main_task: Started on CPU0
I (351) main_task: Calling app_main()
E (371) spi: spi_bus_initialize(776): intr flag not allowed
ESP_ERROR_CHECK failed: esp_err_t 0x102 (ESP_ERR_INVALID_ARG) at 0x400d155a
Apart from making it super easy for us to find the details from the rather sparse descriptions by providing links, what do you know about the error line and how that may have some relevance to your RFM95W and it’s method of connection?
The pin definitions are rather dependent on your wiring which only you know.
Hello, thank you very much for the feedback. That’s right, there is very little information. Please excuse this. I was already so deeply involved in the topic that the problem was clear to me.
I use plattformio as the IDE. When it comes to pin assignment and plugging, I’m actually sure that it fits. The names of the pins are on the RFM95W and I found this graphic for the ESP32.
Permission is granted hereby, free of charge, to any person obtaining a copy
of this software and associated documentation files.
The above copyright notice and this permission notice shall be included in all
copies or substantial portions of the Software.
*/
//Find the default SPI pins for your board
//Make sure you have the right board selected in Tools > Boards
void setup() {
// put your setup code here, to run once:
Serial.begin(115200);
Serial.print("MOSI: ");
Serial.println(MOSI);
Serial.print("MISO: ");
Serial.println(MISO);
Serial.print("SCK: ");
Serial.println(SCK);
Serial.print("SS: ");
Serial.println(SS);
}
void loop() {
// put your main code here, to run repeatedly:
}
The error message says that the arguments of the called function are incorrect. Unfortunately, after my research I can’t get any further. I hope the information is sufficient and thank you very much.
I suspect you’ll be waiting on someone who knows the ESP32 & SPI system well enough to answer - I see you’ve tried the library GitHub issues, you may want to try the ESP32 forum as they should really know how that component works.
rst:0xc (SW_CPU_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3fff0030,len:7076
load:0x40078000,len:15584
ho 0 tail 12 room 4
load:0x40080400,len:4
load:0x40080404,len:3876
entry 0x4008064c
I (31) boot: ESP-IDF 5.1.2 2nd stage bootloader
I (31) boot: compile time Feb 13 2024 20:19:42
I (31) boot: Multicore bootloader
I (35) boot: chip revision: v3.1
I (39) boot.esp32: SPI Speed : 40MHz
I (44) boot.esp32: SPI Mode : DIO
I (48) boot.esp32: SPI Flash Size : 4MB
I (53) boot: Enabling RNG early entropy source…
I (58) boot: Partition Table:
I (62) boot: ## Label Usage Type ST Offset Length
I (69) boot: 0 nvs WiFi data 01 02 00009000 00006000
I (76) boot: 1 phy_init RF data 01 01 0000f000 00001000
I (84) boot: 2 factory factory app 00 00 00010000 00100000
I (91) boot: End of partition table
I (96) esp_image: segment 0: paddr=00010020 vaddr=3f400020 size=0c974h ( 51572) map
I (123) esp_image: segment 1: paddr=0001c99c vaddr=3ffb0000 size=022dch ( 8924) load
I (127) esp_image: segment 2: paddr=0001ec80 vaddr=40080000 size=01398h ( 5016) load
I (131) esp_image: segment 3: paddr=00020020 vaddr=400d0020 size=1fc10h (130064) map
I (184) esp_image: segment 4: paddr=0003fc38 vaddr=40081398 size=0d3e0h ( 54240) load
I (214) boot: Loaded app from partition at offset 0x10000
I (214) boot: Disabling RNG early entropy source…
I (226) cpu_start: Multicore app
I (226) cpu_start: Pro cpu up.
I (226) cpu_start: Starting app cpu, entry point is 0x400823ac
I (213) cpu_start: App cpu up.
I (244) cpu_start: Pro cpu start user code
I (244) cpu_start: cpu freq: 160000000 Hz
I (244) cpu_start: Application information:
I (249) cpu_start: Project name: ttn2
I (254) cpu_start: App version: 1
I (258) cpu_start: Compile time: Feb 13 2024 20:17:56
I (264) cpu_start: ELF file SHA256: 7342b1c3f19e0436…
I (270) cpu_start: ESP-IDF: 5.1.2
I (275) cpu_start: Min chip rev: v0.0
I (279) cpu_start: Max chip rev: v3.99
I (284) cpu_start: Chip rev: v3.1
I (289) heap_init: Initializing. RAM available for dynamic allocation:
I (296) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM
I (302) heap_init: At 3FFB3070 len 0002CF90 (179 KiB): DRAM
I (309) heap_init: At 3FFE0440 len 00003AE0 (14 KiB): D/IRAM
I (315) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM
I (321) heap_init: At 4008E778 len 00011888 (70 KiB): IRAM
I (329) spi_flash: detected chip: generic
I (332) spi_flash: flash io: dio
I (337) app_start: Starting scheduler on CPU0
I (341) app_start: Starting scheduler on CPU1
I (341) main_task: Started on CPU0
I (351) main_task: Calling app_main()
E (371) spi: spi_bus_initialize(776): intr flag not allowed
ESP_ERROR_CHECK failed: esp_err_t 0x102 (ESP_ERR_INVALID_ARG) at 0x400d155a
file: “src/main.cpp” line 91
func: void app_main()
expression: err